Overview
| Details | Information |
|---|---|
| Organization | National Institute of Electronics and Information Technology (NIELIT) |
| Total Vacancy | 21 |
| Posting Location | Delhi |
| Apply End Date | 2026-01-16 |
| Salary | ₹25,000 and ₹2.50 lakh per month |
Vacancy Details
| Post Name | Total Post |
|---|---|
| Resource Person (Academic-Operations) | 1 |
| Consultant (DFT and FPGA Validation) | 1 |
| Consultant (Physical Design) | 1 |
| Team Lead (VLSI Design) | 5 |
| VLSI Design Expert/ Junior VLSI Engineer | 4 |
| Senior Trainers (VLSI Design)/ Senior VLSI Engineer | 3 |
| DevOps Engineer | 1 |
| Full Stack Engineer | 2 |
| Resource Person (Admin and Account) | 1 |
| Assistant | 1 |
| LMS Developer | 1 |
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Educational Qualification
| Post Name | Qualification |
|---|---|
| Resource Person, Consultant And More | B.Sc, B.Tech/B.E, M.E/M.Tech, M.Phil/Ph.D |
Age Limit
| Category | Max Age |
|---|---|
| General | 50 |
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Application Fee
| Category | Fee |
|---|---|
| Per Position | ₹500/- |
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Selection Process
- 1
Performance in walk-in-interview and document verification
Important Dates
| event | date |
|---|---|
| Walk-in Date | 16 January 2026 |
| Document Verification | 09:30 AM to 11:30 AM |
| Interview | 11:00 AM onwards |
How To Apply
- 1Attend Walk-in Document Verification and Interview at the venue on 16 January 2026.
- 2Fill Application Form, attach self-certified documents and Payment Receipt.
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